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in creator/contributor: "Sherwin, M. E."

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Non-alloyed, refractory metal contact optimization with shallow implantations of Zn and Mg

Refractory metal contacts to GaAs show great promise for stability during high-temperature processing and for high-reliability. In this paper the authors report a study of sputtered tungsten and tungsten silicide contacts to ion implanted p-GaAs with both Zn and Mg implantations. This study focused on refractory contacts to shallow implanted contact layers that are suitable for devices such as JFETs and HBTs. The very different energy loss mechanisms of Zn and Mg ions result in different levels… more

Date: March 22, 1994

Creator: Lovejoy, M. L.; Zolper, J. C.; Sherwin, M. E.; Baca, A. G.; Shul, R. J.; Rieger, D. J. et al.

Item Type: Report

Partner: UNT Libraries Government Documents Department

open access

Complementary GaAs junction-gated heterostructure field effect transistor technology

The first circuit results for a new GaAs complementary logic technology are presented. The technology allows for Independently optimizable p- and n- channel transistors with junction gates. Excellent loaded gate delays of 179 ps at 1.2 V and 319 ps at 0.8 V have been demonstrated at low power supply voltages. A power-delay product of 8.9 fJ was obtained at 0.8 V.

Date: September 1, 1994

Creator: Baca, A. G.; Zolper, J. C.; Sherwin, M. E.; Robertson, P. J.; Shul, R. J.; Howard, A. J. et al.

Item Type: Article

Partner: UNT Libraries Government Documents Department

open access

Ion implantation processing for high-speed GaAs JFETs

GaAs Junction Field Effect Transistors (JFETs) offer a higher gate turn-on voltage, resulting in a better noise margin and reduced power dissipation, than the more widely employed GaAs MESFET. The primary reason the JFET has not been more widely used is the speed penalty associated with the gate/channel junction and corresponding gate length broadening. We present the ion implantation processes used for a self-aligned, all ion-implanted, GaAs JFET that minimizes the speed penalty for the JFET w… more

Date: July 1, 1995

Creator: Zolper, J. C.; Baca, A. G.; Sherwin, M. E. & Shul, R. J.

Item Type: Article

Partner: UNT Libraries Government Documents Department

open access

Atomic force microscopy as a process characterization tool for GaAs-based integrated circuit fabrication

While developing the fabrication process for GaAs-based integrated circuits numerous situations have been encountered where an in-line and post-process characterization tool which operates in a non-destructive manner was required. We will report several examples which demonstrate that the atomic force microscope (AFM) fills this characterization void in our laboratory. The AFM is extremely useful where the unintentional removal of small amounts of GaAs can be detrimental in the fabrication of d… more

Date: February 1, 1995

Creator: Howard, A. J.; Baca, A. G.; Shul, R. J.; Zolper, J. C.; Sherwin, M. E. & Rieger, D. J.

Item Type: Article

Partner: UNT Libraries Government Documents Department

open access

Thermally stable oxygen and nitrogen implant isolation of C-doped Al{sub 0.35}Ga{sub 0.65}As

Oxygen and nitrogen ion implantation have been applied to C-doped Al{sub 0.35}Ga{sub 0.65}As layers to produce high resistivity regions ({rho}{sub s} {ge} l {times} 10{sup 10} {Omega}/{open_square} that are stable after annealing at 900C. A dose threshold for stable compensation for both O and N ions was found above 8 {times} 10{sup l3} cm{sup {minus}2} for samples doped at 2 {times} 10{sup l8} cm{sup {minus}3}. Although O implantation has been reported to form stable compensation in Si-doped a… more

Date: December 31, 1993

Creator: Zolper, J. C.; Sherwin, M. E.; Baca, A. G. & Schneider, R. P. Jr.

Item Type: Article

Partner: UNT Libraries Government Documents Department

open access

Complementary GaAs junction-gated heterostructure field effect transistor fabrication for integrated circuits

A new GaAs junction-gated complementary logic technology that integrates a modulation doped p-channel heterostructure field effect transistor (pHFET) and a fully ion implanted n-channel JFET has recently been fabricated. High-speed, low-power operation has been demonstrated with loaded ring oscillators that show gate delays of 179 ps/stage for a power-delay product of 28 fJ at 1.2 V operation and 320 ps/stage and 8.9 fJ at 0.8 V operation. The principal advantages of this technology include the… more

Date: October 1, 1994

Creator: Baca, A. G.; Zolper, J. C.; Sherwin, M. E.; Robertson, P. J.; Shul, R. J.; Howard, A. J. et al.

Item Type: Article

Partner: UNT Libraries Government Documents Department

open access

Electron phase coherent effects in nanostructures and coupled 2D systems

This report describes the research accomplishments achieved under the LDRD Project ``Electron Phase Coherent Effects in Nanostructures and Coupled 2D Systems.`` The goal of this project was to discover and characterize novel quantum transport phenomena in small semiconductor structures at low temperatures. Included is a description of the purpose of the research, the various approaches used, and a detailed qualitative description of the numerous new results obtained. The first appendix gives a … more

Date: May 1995

Creator: Simmons, J. A.; Lyo, S. K.; Klem, J. F.; Sherwin, M. E.; Harff, N. E.; Eiles, T. M. et al.

Item Type: Report

Partner: UNT Libraries Government Documents Department

open access

Compound semiconductor field-effect transistors with improved dc and high frequency performance

A method for making compound semiconductor devices including the use of a p-type dopant is disclosed wherein the dopant is co-implanted with an n-type donor species at the time the n-channel is deposited. Also disclosed are devices manufactured using the method. In the preferred embodiment n-MESFETs and other similar field effect transistor devices are manufactured using C ions implanted with Si atoms in GaAs to form an n-channel. C exhibits a unique characteristic in the context of the inventi… more

Date: December 31, 1995

Creator: Zolper, J. C.; Sherwin, M. E. & Baca, A. G.

Item Type: Patent

Partner: UNT Libraries Government Documents Department

open access

GaAs-based JFET and PHEMT technologies for ultra-low-power microwave circuits operating at frequencies up to 2.4 GHz

In this work the authors report results of narrowband amplifiers designed for milliwatt and submilliwatt power consumption using JFET and pseudomorphic high electron mobility transistors (PHEMT) GaAs-based technologies. Enhancement-mode JFETs were used to design both a hybrid amplifier with off-chip matching as well as a monolithic microwave integrated circuit (MMIC) with on-chip matching. The hybrid amplifier achieved 8--10 dB of gain at 2.4 GHz and 1 mW. The MMIC achieved 10 dB of gain at 2.4… more

Date: May 1, 1998

Creator: Baca, A. G.; Hietala, V. M.; Greenway, D.; Shul, R. J.; Hafich, M. J.; Zolper, J. C. et al.

Item Type: Article

Partner: UNT Libraries Government Documents Department

open access

0.5 μm E/D AlGaAs/GaAs heterostructure field effect transistor technology with DFET threshold adjust implant

A doped-channel heterostructure field effect transistor (H-FET) technology has been developed with self-aligned refractory gate processing and using both enhancement- and depletion-mode transistors. D-HFET devices are obtained with a threshold voltage adjust implant into material designed for E-HFET operation. Both E- and D-HFETs utilize W/WSi bilayer gates, sidewall spacers, and rapid thermal annealing for controlling short channel effects. The 0.5 {mu}m E- HFETs (D-HFETs) have been demonstrat… more

Date: April 1997

Creator: Baca, A. G.; Sherwin, M. E.; Zolper, J. C.; Shul, R. J.; Briggs, R. D.; Heise, J. A. et al.

Item Type: Article

Partner: UNT Libraries Government Documents Department

open access

High-frequency operation of 0.3 {mu}m GaAs JFETs for low-power electronic

GaAs Junction Field Effect Transistors (JFETs) have attracted renewed attention for low-power, low-voltage electronics. JFETs have a significant advantage over MESFETs for low-power operation due to their higher gate barrier to current flow resulting from p/n junction gate. This paper reports recent advances in an all ion implanted self-aligned GaAs JFET with a gate length down to 0.3 {mu}m. By employing shallopw SiF implants next to the gate, dielectric sidewall spacers, and 50 keV source and … more

Date: September 1, 1996

Creator: Zolper, J. C.; Baca, A. G.; Hietala, V. M.; Shul, R. J. & Sherwin, M. E.

Item Type: Article

Partner: UNT Libraries Government Documents Department

open access

Ion implantation in compound semiconductors for high-performance electronic devices

Advanced electronic devices based on compound semiconductors often make use of selective area ion implantation doping or isolation. The implantation processing becomes more complex as the device dimensions are reduced and more complex material systems are employed. The authors review several applications of ion implantation to high performance junction field effect transistors (JFETs) and heterostructure field effect transistors (HFETs) that are based on compound semiconductors, including: GaAs… more

Date: May 1, 1996

Creator: Zolper, J. C.; Baca, A. G.; Sherwin, M. E. & Klem, J. F.

Item Type: Report

Partner: UNT Libraries Government Documents Department

open access

Complementary HFET technology for low-power mixed-mode applications

Development of a complementary heterostructure field effect transistor (CHFET) technology for low-power, mixed-mode digital-microwave applications is presented. An earlier digital CHFET technology with independently optimizable transistors which operated with 319 ps loaded gate delays at 8.9 fJ is reviewed. Then work demonstrating the applicability of the digital nJFET device as a low-power microwave transistor in a hybrid microwave amplifier without any modification to the digital process is p… more

Date: June 1, 1996

Creator: Baca, A. G.; Sherwin, M. E.; Zolper, J. C.; Dubbert, D. F.; Hietala, V. M.; Shul, R. J. et al.

Item Type: Article

Partner: UNT Libraries Government Documents Department

open access

Dry etch development of W/WSi short Gate MESFETs

The use of refractory metal thin films in the fabrication of high-speed, high-density GaAs field effect transistors (FETs) are prominent with applications as interconnects, via plugs, and ohmic and Schottky contacts. Tungsten and tungsten silicide can be used in a self-aligned gate process as the ion implantation mask during the formation of source and drain regions for metal-semiconductor FETs (MESFETs). The gate etch must be highly anisotropic to accurately define the implant region. Reactive… more

Date: January 1, 1996

Creator: Shul, R. J.; Sherwin, M. E.; Baca, A. G.; Zolper, J. C. & Rieger, D. J.

Item Type: Article

Partner: UNT Libraries Government Documents Department

open access

Ion-implanted GaAs JFETs with f{sub t} {gt} 45 GHz for low-power electronics

GaAs Junction Field Effect Transistors (JFETs) are reported with gate lengths down to 0.3 micrometers. The structure is fully self-aligned and employs all ion implantation doping. p[sup +]-gate regions are formed with either Zn or Cd implants along with a P coimplantation to reduce diffusion. The source and rain implants are engineered with Si or SiF implants to minimize short channel effects. JFETs with 0.3 micrometer gate length are demonstrated with a sub-threshold slope of 110 mV/decade alo… more

Date: December 31, 1996

Creator: Zolper, J. C.; Baca, A. G.; Hietala, V. M.; Shul, R. J. & Sherwin, M. E.

Item Type: Article

Partner: UNT Libraries Government Documents Department

open access

Ion implantation for high performance III-V JFETS and HFETS

Ion implantation has been an enabling technology for realizing many high performance electronic devices in III-V semiconductor materials. We report on advances in ion implantation processing for GaAs JFETs (joint field effect transistors), AlGaAs/GaAs HFETs (heterostructure field effect transistors), and InGaP or InAlP-barrier HFETs. The GaAs JFET has required the development of shallow p-type implants using Zn or Cd with junction depths down to 35 nm after the activation anneal. Implant activa… more

Date: June 1, 1996

Creator: Zolper, J. C.; Baca, A. G.; Sherwin, M. E. & Klem, J. F.

Item Type: Article

Partner: UNT Libraries Government Documents Department

open access

Comparison of GaAs JFETs to MESFETs for high-temperature operation

GaAs-based Metal Semiconductor Field Effect transistors (MESFETs) and High Electron Mobility Transistors (HEMTs) have been the focus of research for high-temperature operation due to the 1.42 eV band gap of GaAs that reduces thermal carrier generation as compared to 1.1 eV silicon-based electronics. Although schemes have been proposed to minimize substrate currents at elevated temperatures, high-temperature operation of these devices is ultimately limited by the gate leakage current of the Scho… more

Date: June 1, 1996

Creator: Zolper, J. C.; Hietala, V. M.; Housel, M. S.; Baca, A. G. & Sherwin, M. E.

Item Type: Article

Partner: UNT Libraries Government Documents Department